SDA_FORCE_OUT | 1: normally ouput sda data 0: exchange the function of sda_o and sda_oe (sda_o is the original internal output sda signal sda_oe is the enable bit for the internal output sda signal) |
SCL_FORCE_OUT | 1: normally ouput scl clock 0: exchange the function of scl_o and scl_oe (scl_o is the original internal output scl signal scl_oe is the enable bit for the internal output scl signal) |
SAMPLE_SCL_LEVEL | Set this bit to sample data in SCL low level. clear this bit to sample data in SCL high level. |
MS_MODE | Set this bit to configure the module as i2c master clear this bit to configure the module as i2c slave. |
TRANS_START | Set this bit to start sending data in txfifo. |
TX_LSB_FIRST | This bit is used to control the sending mode for data need to be send. 1: receive data from most significant bit 0: receive data from least significant bit |
RX_LSB_FIRST | This bit is used to control the storage mode for received datas. 1: receive data from most significant bit 0: receive data from least significant bit |
CLK_EN | This is the clock gating control bit for reading or writing registers. |